Test Yields

Increased Test Yields Through The Reduction of Board Flex

By Rich Rivas, Sales Application Engineer, ECT

Stress in the PC board test environment is a common occurrence. If you are a test engineer, I am sure that issues such as time to market requirements and shrinking test points immediately come to mind. However, the stress that may be the most damaging is almost certain to be overlooked.

The stress I am referring to is the intense physical strains that a PC board must withstand during in-circuit test! Double-sided surface mount is becoming the norm. PCB design engineers are forced to add higher numbers of test points to ever-shrinking board sizes. No-clean environments demand higher spring force probes. Rigid materials such as epoxy laminates commonly used to manufacture printed circuit boards are being replaced by alternative materials that offer far less rigidity.

New applications such as PCMCIA are forcing the industry to produce thinner boards. These issues will continue to magnify the effects of board stress during the test cycle. Board flex concerns that did not exist in the good old through-hole world will now become failure-inducing.

Even more frightening is the prospect that board flex will mask manufacturing defects resulting in fatal escapes! To illustrate the potential for disastrous test results associated with board flex, I will address two examples. First, the potential damage to surface mount components, and second, exposing the possibility that board flex during in-circuit test will actually mask manufacturing defects.

PC Board Flex and Component Damage Board stress at in-circuit test is the result of the forces necessary to hold the board in place while the pressures of the spring probes making contact with the board are being actuated simultaneously to the appropriate probe travel. These opposing forces cause the board to flex. It is this uncontrolled board flex that can produce damage during test. Board size and thickness can vary greatly from one assembly to another.

However, our experience shows that it is not unusual to see a mixed technology board (through-hole and SMD) that is 9″ x 11″ x .063″ thick and must support the probing of up to 1500 test points. In the case where the use of a 6.3 oz. probe is the necessary choice, this board must overcome 591 lbs. of cumulative spring force during fixture actuation! In a typical case, the spring forces are concentrated within certain areas of the board due to test point placement during the PCB design or through the use of leaded components such as connectors for locating test points.

These concentrated areas of probe force can lead to severe board deflection resulting in a positive bow or “dome” when referenced from 0 datum on the Z axis. Conversely, when vacuum is applied and the UUT is pulled down onto the board stops, a negative bow or “dip” will be forced in the area of the UUT that is located in-between each board stop.

Board stress analysis, illustrated with the use of finite eliminate software, can be used to show just how dramatic these concentrations of force can be. Please see the stress contour plot in fig. 1 for details. In a study performed by Delco Electronics-Powertrain Division in Kokomo, Ind., five fixtures were purchased from three different fixture manufacturers.

Three of these fixtures were manufactured using typical vacuum fixturing techniques such as the use of .125″ gaskets combined with .187″ top plates. The board used in this study was 6″ x 8″ x .063″ thick and utilized only 400 ea. 4.0 oz. probes, a mild scenario as compared to the mixed technology boards mentioned as common in previous statements. Yet, in one case the maximum board deflection measured was .071″! (See fig. 2 )

DELCO ELECTRONICS-KOKOMO: BOARD FLEX MEASUREMENTS ON VACUUM FIXTURES
Typical Fixture Design  

#Vendor 1Vendor 2Vendor 3
1.024″.000″.036″
2.030″.037″.030″
3.046″.000″.021″
4.051″.033″.000″
5.014″.000″.000″
6.038″.036″.022″
7.053″.044″.026″
8.071″.030″.029″
9.062″.039″.040″
10.020″.036″.000″
11.034″.032″.000″
12.027″.000″.012″
13.039″.025″.014″
14.050″.000″.015″
Mm/.014″
.071″
.000″
.044″
.000″
.057″.044″.040″
R1234R
5678910
R11121314R

Board measurements were taken from the same board on 5 different test fixtures used by Delco Electronics-Kokomo Pwertrain Electronics Group. See drawing directly above for location of each measurement. The 4 corners of the board were used as a reference when measuring each location. The fixtures measured had a dense area of probes near location 7 and 8, where most fixtures had the most board flex.

Data taken from report by Jay Walter, Test Engineer at Delco Electronics-Powertrain/Kokomo, IN.Now, let’s compare the Delco findings to the results of a report published by Murata Electronics (UK) Ltd. titled ‘Chip Type Monolithic Ceramic Capacitor Bending Strength Technical Data’. Murata designed a test to assess the bending strength of SMD’s against the physical stress caused by a PC board being bent to external forces such as board mounting or in-circuit test.

Controlled samples of six industry standard ceramic capacitors were mounted to identical test boards (using reflow solder) and controlled pressure applied to each board. Using previously established acceptance criteria as guidelines, the boards were flexed and capacitance values recorded for every .5 mm (.0195″ ) of flex. (See fig 3 ).

Based upon Murata’s acceptance criteria, the findings were dramatic. Large chip capacitors proved to be more fragile than the smaller packages, and the material composition of the capacitor itself substantially influenced the results.

Figure 3 Acceptance Criteria Products shall be determined to be defective if the changes in capacitance has exceeded the range specified in the table.

CharacteristicsChange in Capacitance
COGLess than ± 2.5% or ± 0.25 pF, whichever is greater
X7RLess than ± 12.5%
Y5VLess than ± 20%

[Explanation] Some capacitance changes can occur due to deflection stress. If a crack occurs in a chip capacitor, the capacitance value could fall to anywhere from 50% to less than 30% of the initial value depending on the type of failure and the design of the capacitor survival rate. The survival rate is calculated using the next equation. The decision if the product is defective depends on the acceptance criteria of the user.

Survival Rate [ % ] =Number of samples (n) – Number of defective productsx 100
___________________________
___________________________
___________________________

Number of samples (n)

Figure 4 clearly illustrates the effect that board stress has on large chip capacitor yields.

The study shows that all three material types characterized will begin to show fatal component cracking that will cause an unacceptable variation in capacitance measurements at > 3mm (.117″) of board flex, regardless of EIA package size.

However, in the case of the two most fragile package materials characterized, the X7R and the Y5V, a substantial increase in component defect rates begins at only 2mm (.078″) of board flex. The X7R material for EIA component size 1812 shows a survival rate of only 85% at 2mm of board flex. The same component made from the Y5V material drops to only 80% survival rate.

Even more severe is the effect board flex has on EIA size 2220 Packages. The survival rate of the X7R material is only 60% at 2mm of board flex and falls to 40% on the Y5V material!

Now, let’s combine the conclusions derived from the Delco and Murata studies. The Murata study clearly illustrates that at > 2mm, or .078″ of board flex, substantial component failure can occur. At the same time, the Delco study revealed that on a standard in-circuit test fixture utilizing a 6″ x 8″ x .063″ board with only 400 low spring force probes, it was possible to measure up to .071″ of board flex during in-circuit test.

This combination of data clearly illustrates that uncontrolled board flex during the test cycle can lead to substantial component damage and reduced yields during or after test. Multiply the test point counts and vary the physical characteristics of the test board to match some of the more challenging combinations used, and it appears certain that our potential for catastrophic failures will multiply in equal proportions.

PC Board Flex and Undetected Opens at in-circuit test

The never ending attempt to detect open solder joints during in-circuit test have been a challenge for as long as PC boards have been manufactured. The increased usage of fine pitch SMD components throughout the industry have made board manufacturing even more difficult resulting in an increased frequency of open solder joints following assembly. Many professionals from around the test world have used this challenge as the mother of invention and innovations such as Hewlett Packard’s Test Jet has given test engineers new tools in detecting this problem. However, no solution for detecting open solder joints can be effective if unsoldered leads are being forced to make contact with the land during test, and that is exactly what uncontrolled board flex can do!In most cases, an unsoldered lead on a surface mount component will have a small gap between the lead and the board land. This gap can range in size, but will generally measure generally measure between .01″ and .05″. As we have illustrated in the Deco study, the board flex generated on standard vacuum fixturing can far exceed the width of these gaps. Add opposing spring force and random board support placement and the probability for causing an open solder joint to be flex closed during test increases dramatically.

Another consideration is the use of mechanical fixturing as an alternative method for interfacing between a UUT and a tester. The term mechanical fixture refers to a style of fixturing that does not use vacuum as a method for holding a board in place during test.

This method of fixturing can increase the probability of flexing an open solder joint closed during test. The most common mechanical fixture is a vacuum fixture that has the probe field isolated from vacuum and a hold down gate mounted to the top plate that will close down over the board. Physical stops are mounted to support bars on the hold down gate and come in contact with the board when the gate is closed.

When test is initiated, the top plate is pulled down bringing the board into contact with the probe field. The forces of these probes making contact with the board will lift the board into the mechanical stops and the probes will then actuate to the appropriate travel. This design has inherent problems in relation to board flex.

Overcoming spring probe force during test takes a tremendous amount of opposing force. Vacuum fixtures have the advantage of utilizing atmospheric pressure to evenly distribute this force. Conversely, a mechanical fixture must rely on randomly placed mechanical stops that concentrate the opposing forces in areas where contact between the mechanical stops and board occurs. Furthermore, spring probe force is likely to be concentrated on the opposing side of a component that cannot be pressed by a mechanical stop without extreme risk of component damage.

These random and uncontrolled forces can cause tremendous amounts of board flex. It is not uncommon to find a loss of probe travel exceeding .100″ due to board deflection caused by the pressure of the spring probes being pressed against the test points. There are some instances when placing a mechanical stop on a connector will help flatten out that area of the board without much risk of connector damage. However, if the connector happens to be a surface mount style it is conceivable to push an open lead closed. In either instance, the potential to mask unsoldered opens during in-circuit test is undeniable.

Please see the stress contour plot in fig. 5 as an example of the board flex induced during test with a mechanical fixture. To fully appreciate the impact that board flex has on undetected open solder joints at in-circuit test, it’s important to look at functional or system level test yields after in-circuit test has been performed. AT&T-NSC in Lisle, Illinois, offers an excellent example of tremendous yield improvement at system level test by controlling board flex at in-circuit test.

AT&T-NSC had a dilemma that was having an adverse effect on productivity and the ability to ship systems. First pass yields at in-circuit test were running at a consistent level of 85%. However, first pass yields at system test were running a very low 60%. Since failure modes don’t normally appear as the result of some cosmic force while moving boards from one test location to another, it was safe to assume that some particular manufacturing defect was escaping from in-circuit test.

W.G. (Bill) Pfaff, a member of the technical staff in the Test Development Group, began gathering data from system test in an attempt to define the root cause for post-test failures. Bill found that an alarming rate of open solder joints on fine pitch SMD’s required rework after failing at system test.

The obvious and perplexing question was “Why are these opens being missed at in-circuit test”.

After eliminating any obvious causes for escapes such as test program reliability or fixture malfunction, Bill concluded that the board flexing under test was somehow masking these defects. Bill contacted Gary St. Onge, Vice President of Fixturing Operations for Everett Charles Technologies, to discuss his theory and the solutions to these escapes.

Gary was all too familiar with the potential for problems at in-circuit test due to excessive board stress. This knowledge had lead him to pioneer the use of tools such as Finite Element software to design fixture gaskets that could minimize board flex during test.

After determining that the gasket support placement on the suspect fixtures was sufficient, experimental gasket support pieces were manufactured utilizing higher Durometer rated compounds that would offer more rigidity than the original supports.

Subsequent tests showed positive results and it quickly became apparent that the more rigid the board support, the less board flex would occur thus reducing the frequency of open solder joint escapes. Eventually, a vacuum fixture was produced that completely eliminated the use of board supports but instead allowed the board to be pulled down flat onto the fixture top plate thus providing the ultimate board support.

This fixturing technique reduced board flex to an average of .014″ over the entire surface of the board while under test. The effect that this reduction in board flex had on AT&T’s ability to detect open solder joints at in-circuit test and improve first run yields at system test was remarkable! First pass yields at in- circuit test were reduced by 10% (from 85% to 75%).

However, first pass yields at system test rose an astounding 23% (from 60% to 83%)! This is truly a success story.

Conclusion

Board flex that is the result of the stress applied during in-circuit test can be controlled to safe and acceptable levels through the application of advanced fixture technologies. In a typical test environment, a vacuum source supplying 20 hg is used to actuate the test fixture. This equates to 10 psi of atmospheric pressure along the surface of the board that is available to counter the cumulative spring force of the test probes (i.e.: a 10″ x 10″ PC board would have 1000 lbs. of atmospheric pressure available as counter force).

If the cumulative spring force of the test probes used within a fixture is less than the atmospheric pressure available as counter force, then the fixture manufacturing method mentioned in the AT&T study is the only proven solution available for overcoming test induced board flex.

The fixture used in the AT&T study uses a combination of materials and manufacturing techniques to offer the UUT the maximum support available. The standard .187″ top plate typically used to support the board and gasket is replaced by a top plate that is .375″ thick. This ensures a much more rigid plate that is less inclined to flex during actuation.

A one-piece molded gasket is created with no board supports. This gasket is only intended to provide a seal as the entire top plate now becomes the board support. A contour of the gasket pattern is routed into the top plate and the gasket is installed within this routed contour, exposing only the sealing rib of the gasket above the horizon of the top plate.

When the UUT is in place and vacuum is applied at the start of test, the exposed rib of the gasket will complete a seal with the board and then collapse parallel with the horizon of the top plate. This action allows the UUT to rest completely flush on the top plate thereby becoming an integral part of the top plate itself. Once this action occurs, the top plate and UUT then travel down and make contact with the probe field. Given the conditions previously stated, this fixture method will hold a board flat on the Z axis within .020 from zero datum.

If the cumulative spring force of the probes within a particular area of the fixture exceeds the atmospheric pressure available to overcome that force, positive board flex will occur. New technology such as ball grid array will force large numbers of spring probes to be concentrated in dense locations and will increase the probability that this condition will occur. When this condition is present, it is necessary to combine the vacuum fixture method previously described with a mechanical hold down gate to support mechanical stops.

In the areas of the UUT where the spring force of the probes is still less than the atmospheric pressure being applied, it remains necessary to compensate for the negative bow using the previously suggested method. However, in the locations on the UUT where the spring force is greater than the atmospheric pressure available, it is necessary to use a mechanical stop to compensate for the excessive spring force.

The use of a mechanical stop will minimize the positive bow, but the absolute flatness in this area of the UUT will depend upon the area available on the top surface of the board for safe mechanical stop placement.

The examples and studies that have been used to define this text prove very clearly that board flex, resulting from the use of standard vacuum or mechanical fixturing techniques, can result in severe component damage and the masking of manufacturing defects. However, the technology to overcome this nemesis does exist and can be used to minimize the effect on test yields.

If you are a test designer or the user of fixture products, it is important to understand the physical limitations of the boards you are testing so that educated decisions can be made when choosing a fixture style or manufacturer.

This extra care up- front will pay dividends with improved yields after test! Acknowledgment: Everett Charles Technologies would like to express our gratitude to Mr. William G. Pfaff for his contributions to this article.

Refrences:

1. Murata Electronics (UK) Ltd., “Chip Type Monolithic Ceramic Capacitor Bending Strength Technical Data”, issued 1994.
2. Delco Electronics, Powertrain Division, Kokomo, Indiana, “In Circuit Test Fixturing”, issued July 1991